Rhino Core Q85 Smart Module Introduction
Product Overview
The Rhino Pi X1R development board is built on the Rhino Core Q85 smart module and the X1R/A1R shared mainboard, targeting robotics, industrial vision, and edge AI control terminals. It provides high-performance AI computing, multimedia interfaces, dual Gigabit Ethernet, Wi-Fi 6/BT5.3, and a rich set of industrial buses, helping customers quickly complete prototype validation and project onboarding.
Key highlights of the processor:
- Compute domain: QCS8550 platform with 48 TOPS (INT8) / 12 TOPS (FP16) AI compute, suitable for multi-camera perception, robot interaction, visual inspection, and edge AI inference.
- Real-time domain: X1R/A1R shared mainboard supports dual Gigabit RJ45, USB 3.0/2.0, HDMI, eDP, MIPI DSI/CSI, CAN, RS485, UART, I2C, SPI, GPIO, and other interfaces.
- System resources: onboard Wi-Fi 6/BT5.3, supports Mini-PCIe expansion for 4G communication, suitable for rapid development of robotics, industrial control, and intelligent terminals.
Product Appearance
Photos of the Rhino Core Q85 smart module:
Front
Back
Physical Dimensions
| Item | Parameter |
|---|---|
| PCBA dimensions | 40mm × 40mm (±0.5mm) |
| Board thickness | 1.0mm (±10%) |
| Mounting hole diameter | 4mm |
| Screw hole specification | ∮2.2mm × 4 (±10%) |
For detailed dimension information, contact the APLUX FAE at noah.yang@aidlux.com.
Product Specifications
CPU
The core board uses the Qualcomm QCS8550 CPU in a 1581 MPSP package, with a chip size of 15.6 × 14.0 × 0.56mm.
| Item | Parameter |
|---|---|
| AI compute | 48 TOPS (INT8) |
| CPU | 1× Kryo Prime @ 3.2GHz + 2× Kryo Gold @ 2.8GHz + 3× Kryo Silver @ 2.0GHz |
| GPU | Adreno 740 |
| Process | 4nm |
| Video decode | 4K@240fps / 8K@60fps (H.264 / H.265 / VP9) |
| Video encode | 4K@120fps / 8K@30fps (H.264 / H.265) |
ROM
The core board's UFS interface supports up to UFS 4.0 Gear 5 Rate A, 1×2 lane. By default, one SK Hynix 128GB UFS is populated, with expansion up to 512GB.
RAM
The core board connects to LPDDR5X via the EBI controller in PoP form, at a maximum frequency of 4266MHz. By default, 12GB LPDDR5X is populated, with expansion up to 24GB.
Power
The core board uses the Qualcomm PMIC power solution to meet the system power supply and CPU power-up/down sequencing requirements. It uses DC power supply with a typical supply voltage of 3.8V.
Peripheral Resources Overview
The core board routes out the following interface resources through board-to-board connectors (Panasonic AXK600337YG / AXK680337YG series):
| Interface Resource | Quantity | Performance Parameters |
|---|---|---|
| CSI | 5 groups | 4 groups 4lane + 1 group 2lane, DPHY V1.2 2.5Gbps/lane, CPHY v2.0 13.68Gbps/trio |
| DSI | 2 groups | Two groups 4lane, up to 3480×2160@120Hz, 3360×1600@144Hz |
| PCIe | 2 groups | 1× PCIe 3.0 2lane (8Gbps) + 1× PCIe 4.0 2lane (16Gbps) |
| USB | 1 group | USB 3.1 Gen2, up to 10Gbps, supports OTG, compatible with DP1.4, supports MST mode |
| SD | 1 group | 4bits, supports SD 3.0 / SDR104, only 1.2V IO level |
| SPI | 5 groups | 4 general-purpose SPI + 1 dedicated SPI, master mode only |
| UART | 10 groups | 1 debug + 1 four-wire UART + 8 two-wire UART |
| I2C | 9 groups | 4 camera-dedicated I2C + 4 general-purpose I2C + 1 sensor I2C |
| I2S | 2 groups | 1 non-LPI I2S + 1 LPI I2S |
| SWR | 1 group | Supports PCM / PDM / DATA data formats |
| GPIO | 50 groups | 50 GPIO resources |
| ADC | 2 groups | Voltage range 0~1.875V, sampling rate 4.8MHz |
| PWM | 2 groups | Routed from PM8550 |
Notes
Please pay attention to the following key points when assembling and using the Rhino Core Q85 smart module:
- Environmental requirements: Relative humidity 0~95% non-condensing, operating temperature -25°C ~ 50°C, storage temperature -30°C ~ 80°C.
- ESD protection: This product is not ESD-protected by design; ESD protection must be designed into the carrier board.
- Level matching: Pay attention to level matching when designing external interfaces.
- High-speed signals: When designing high-speed signal interfaces, handle the Layout routing according to design requirements to ensure interface performance.
Document Information
- Official product name: Rhino Core Q85 Smart Module
- Full product code: Rhino Core Q85
- Document version: V1.0
- Release date: 2026-06-11
- Classification: Public
- Scope of application: Rhino Core Q85 smart module and carrier board / complete product development projects based on this module
© 2026 APLUX Intelligent Technology Co., Ltd. No unauthorized copying, distribution, or use beyond the scope agreed in this document.