Pin Definition and Applications

The Rhino Pi-A1 features an onboard 2×24 PIN GPIO interface.

Warning

When using the 48-Pin GPIO interface, pay attention to the wiring between the pins and peripherals. Ensure correct pin connections—improper operation may cause damage to the device hardware.

48-Pin 3.3V GPIO Expansion Interface

The Rhino Pi-A1 is equipped with a 2×24 PIN interface, providing highly flexible interface support for hardware expansion. Users can connect various sensors, communication modules, displays, and other embedded peripherals via this interface to implement rapid prototyping and functional verification in fields such as the Internet of Things (IoT), robot control, and industrial automation.

The functions of the 48-Pin 3.3V GPIO expansion interface are shown in the table below:

Category	Interface	Description
Signal conversion	CAN interface	2x CAN FD
Signal conversion	RS485	1x RS485
Signal conversion	RS232	2x RS232
Signal conversion	Optocoupler	2x input, 2x output, interface voltage range 5~30V
Reserved signal interface	I2S	1x
Reserved signal interface	SPI	1x
Reserved signal interface	DEBUG UART	1x
Reserved signal interface	UART	1x
Reserved signal interface	GPIO	5x
Reserved signal interface	5V	1x
Reserved signal interface	3.3V	1x

Board Pin Definition Table

Table 1

No.	Board Silkscreen	GPIO/System Mapping	Description
1	HDMI_OUT	OUT3.3V	3.3V voltage
2	5V	GPIO117	After pulling the pin level high, the pin outputs 5V voltage, restored after device restart
3	GND	GND	Ground
4	GND	GND	Ground
5	DBG_TX	DBG_TX	Debug-UART TX pin, used for system serial log input/output
6	DBG_RX	DBG_RX	Debug-UART RX pin, used for system serial log input/output
7	UART4_RX	UART4_RX	UART RX pin
8	UART4_TX	UART4_TX	UART TX pin
9	GPIO5/OUT	GPIO17	Corresponds to GPIO17, for GPIO expansion
10	GPIO199/OUT	GPIO148	Corresponds to GPIO148, for GPIO expansion
11	I2S0_SCK	I2S0_SCK	I2S audio bit clock, used for audio data synchronous transmission
12	SPI1_MISO	SPI1_MISO	SPI1 master-in slave-out, serial data receive channel
13	I2S0_WS	I2S0_WS	I2S audio frame synchronization, distinguishes left/right channel data
14	SPI1_MOSI	SPI1_MOSI	SPI1 master-out slave-in, serial data transmit channel
15	I2S0-DATA0	I2S0-DATA0	I2S audio data channel 0, transmits audio sample data
16	SPI1_CLK	SPI1_CLK	SPI1 serial clock, synchronizes bus data transmission
17	I2S0-DATA1	I2S0-DATA1	I2S audio data channel 1, transmits audio sample data
18	SPI1_CS_N	SPI1_CS_N	SPI1 chip select signal, active low, selects slave device
19	GND	GND	Ground
20	GND	GND	Ground
21	RS232_1_TX	RS232_1_TX	First RS232 serial transmit pin
22	RS232_1_RX	RS232_1_RX	First RS232 serial receive pin
23	OUT_GPIO40_INT	GPIO35	Corresponds to GPIO35, for GPIO expansion
24	OUT_GPIO87_INT	GPIO158	Corresponds to GPIO158, for GPIO expansion

Table 2

No.	Board Silkscreen	GPIO/System Mapping	Description
1	RS232_TX	RS232_TX	Second RS232 serial transmit pin
2	RS232_RX	RS232_RX	Second RS232 serial receive pin
3	GPIO/OUT	GPIO16	Corresponds to GPIO16, for GPIO expansion
4	GND	GND	Ground
5	GND	GND	Ground
6	GND	GND	Ground
7	SPK_P	SPK_P	Speaker differential output positive
8	RS485_A	RS485_A	RS485 differential communication A line
9	SPK_N	SPK_N	Speaker differential output negative
10	RS485_B	RS485_B	RS485 differential communication B line
11	GND	GND	Ground
12	GND	GND	Ground
13	LINELN2+	LINEOUT1+	Optocoupler output 1, voltage determined by PIN 15
14	LINELN1+	LINELN1+	Optocoupler input 1
15	LINELN2-	LINEOUT1_POWER	Optocoupler output voltage 1
16	LINELN1-	LINEOUT2_POWER	Optocoupler output voltage 2
17	LINEOUT2+	LINEOUT2+	Optocoupler output 2, voltage determined by PIN 16
18	LINEOUT1+	LINELN2+	Optocoupler input 2
19	LINEOUT2-	GND	Ground
20	LINEOUT1-	GND	Ground
21	CAN_H0	CAN_H1	Actually corresponds to can1
22	CAN_L0	CAN_L1	Actually corresponds to can1
23	CAN_H1	CAN_H0	Actually corresponds to can0
24	CAN_L1	CAN_L0	Actually corresponds to can0