Pin Definitions

Connectors

The core board connects to the carrier board through the following Panasonic board-to-board connectors:

Connector	Model	Mating Part Model
J1, J2, J3	Panasonic AXK600337YG	AXK500137YG
J4	Panasonic AXK680337YG	AXK580137YG

J1 Pin Definitions

PIN#	Signal	I/O	Description	Remarks
88,90,92,94,96,98,100	USB_VBUS	PI/PO	USB_VBUS, supports QC5.0 fast charging input, voltage range 3.7V to 12.6V
85,87,89,91,93,95,97,99	VBATT	PI	Core board power supply, voltage range 3.5 to 4.2V
84,86	VREG_BOB1	PO	Core board BUCK OR BOOST output, powers the CODEC IC
1,2,24,27,44,50,51,55,59,74,76,77,78,79,80,81,82,83	GND	G	Digital ground
75	VCOIN	PI/PO	RTC backup power
73	VBATT_CONN_VSENSE_P	AI	Battery voltage sense signal
71	VBATT_CONN_VSENSE_M	AI	Battery voltage sense signal
72	PM7325_ADC2	AI	PM7325 ADC2
70	PM7325_ADC4	AI	PM7325 ADC4
69	VBATT_PACK_SNS_M	AI	Remote sense of the second cell voltage in a 1S2P battery
67	BATT_ID	AI	Battery identification, detection, and BSI communication
65	BATT_THERM	AI	Battery temperature sensor
63	USB0_THERM	AI	Type-C temperature sensor
61	USB1_LD_SW_EN	I/O	PM7325 GPIO08	USB power output control
66,68	VREG_S1B_1P856	PO	1.8V output
64	VREG_L6C_2P96	PO	2.96/1.8V output	TF card IO power
62	VREG_L12C_1P8	PO	1.8V output
60	VREG_L8C_1P8	PO	1.8V output	IO power
58	VREG_L3C_3P0	PO	3V output
56	VREG_L7C_3P0	PO	3V output
54	VREG_L18B_1P8	PO	1.8V output
52	VREG_L11C_2P8	PO	2.8V output
48	USB0_HS_DM	I/O	USB0 data-	USB2.0 OTG
46	USB0_HS_DP	I/O	USB0 data+	USB2.0 OTG
57	PMK_CLK_NFC	AO	19.2MHz clock output, 1.2V	NFC clock
53	SLEEP_CLK	AO	32.7645kHz clock output, 1.8V	Wi-Fi sleep clock
49	AOSS_SLEEP_INDICATOR	AI	Reserved AlwaysON SubSystem sleep detection signal
47	GPIO_0_I2C_SDA*	OD	General-purpose I2C bus, 1.8V level
45	GPIO_1_I2C_SCL	OD	General-purpose I2C bus, 1.8V level
43	GPIO_104*	DI	GPIO104, 1.8V level
41	GPIO_142*	I/O	GPIO142, 1.8V level
40	KPD_PWR_N	DI	Power on/off signal, active-low
39	GPIO_101*	I/O	GPIO101, 1.8V level
38	PM_RESIN_N	DI	Reset signal, active-low
37	GPIO_102*	I/O	GPIO102, 1.8V level
36	PM_KYPD_VOLP_N	DI	Volume control signal
35	GPIO_141*	I/O	GPIO141, 1.8V level
34	GPIO_94	I/O	GPIO7, 1.8V level	Camera power control signal
33	GPIO_60*	I/O	GPIO60, 1.8V level	EDP_HOT_PLUG_DETECT
31	GPIO_61*	I/O	GPIO61, 1.8V level
32	GPIO_90*	DI	GPIO90, 1.8V level
30	GPIO_95*	DO	GPIO95, 1.8V level
29	PWM_PM7350C_GPIO_8	DO	PM7350C PWM	Used for backlight adjustment of eDP/MIPI LCM
28	VBATT_OPT_ISNS_P	AI	Battery current sense P signal
26	VBATT_OPT_ISNS_M	AI	Battery current sense N signal
21	DSI0_NC_LN3_M	AO	MIPI DSI0 data signal	DSI0
19	DSI0_C2_LN3_P	AO	MIPI DSI0 data signal	DSI0
17	DSI0_C1_CLK_M	AO	MIPI DSI0 clock signal	DSI0
15	DSI0_B1_CLK_P	AO	MIPI DSI0 clock signal	DSI0
13	DSI0_A0_LN0_P	AO	MIPI DSI0 data signal	DSI0
11	DSI0_B0_LN0_M	AO	MIPI DSI0 data signal	DSI0
9	DSI0_B2_LN2_M	AO	MIPI DSI0 data signal	DSI0
7	DSI0_A2_LN2_P	AO	MIPI DSI0 data signal	DSI0
5	DSI0_C0_LN1_P	AO	MIPI DSI0 data signal	DSI0
3	DSI0_A1_LN1_M	AO	MIPI DSI0 data signal	DSI0
22	EDP0_TX0_FLT_P	AO	eDP0 data signal	eDP0
20	EDP0_TX0_FLT_M	AO	eDP0 data signal	eDP0
18	EDP0_TX1_FLT_P	AO	eDP0 data signal	eDP0
16	EDP0_TX1_FLT_M	AO	eDP0 data signal	eDP0
14	EDP0_AUX_CONN_P	AO	eDP0 AUX signal	eDP0
12	EDP0_AUX_CONN_M	AO	eDP0 AUX signal	eDP0
10	EDP0_TX3_FLT_P	AO	eDP0 data signal	eDP0
8	EDP0_TX3_FLT_M	AO	eDP0 data signal	eDP0
6	EDP0_TX2_FLT_M	AO	eDP0 data signal	eDP0
4	EDP0_TX2_FLT_P	AO	eDP0 data signal	eDP0

J2 Pin Definitions

PIN#	Signal	I/O	Description	Remarks
1	GPIO11_UART2_RXD	DI	UART data input signal, 1.8V level	General-purpose UART
3	GPIO10_UART2_TXD	DO	UART data output signal, 1.8V level	General-purpose UART
2	GPIO19_UART4_RXD	DI	UART data input signal, 1.8V level	General-purpose UART
4	GPIO18_UART4_TXD	DO	UART data output signal, 1.8V level	General-purpose UART
5	GPIO_9	I/O	GPIO09, 1.8V level
6	GPIO_17	I/O	GPIO17, 1.8V level
7	GPIO_8*	I/O	GPIO08, 1.8V level
8	GPIO_16*	I/O	GPIO16, 1.8V level
9	GPIO7_UART1_RXD	DI	UART data input signal, 1.8V level	General-purpose UART
11	GPIO6_UART1_TXD	DO	UART data output signal, 1.8V level	General-purpose UART
10	GPIO15_SPI_CS*	DO	SPI chip select signal, 1.8V level	General-purpose SPI
12	GPIO14_SPI_SCLK	DO	SPI clock signal, 1.8V level	General-purpose SPI
14	GPIO13_SPI_MOSI	DO	SPI MOSI signal, 1.8V level	General-purpose SPI
16	GPIO12_SPI_MISO*	DI	SPI MISO signal, 1.8V level	General-purpose SPI
15	GPIO78_CAM3_RST_N*	DO	Camera 3 reset signal line, 1.8V level	RST For CSI3
17	GPIO77_CAM2_RST_N*	DO	Camera 2 reset signal line, 1.8V level	RST For CSI2
19	GPIO21_CAM1_RST_N*	DO	Camera 1 reset signal line, 1.8V level	RST For CSI1
21	GPIO20_CAM0_RST_N*	DO	Camera 0 reset signal line, 1.8V level	RST For CSI0
18,20	VREG_L9C_2P96	PO	1.8/2.95V output	TF card power
22	SDC2_CD_N	DI	SD card insertion detection, active-low	TF card
24	SDC2_DATA_3	I/O	SD data line	TF card
26	SDC2_DATA_2	I/O	SD data line	TF card
28	SDC2_DATA_1	I/O	SD data line	TF card
30	SDC2_DATA_0	I/O	SD data line	TF card
32	SDC2_CMD	I/O	SD command line	TF card
34	SDC2_CLK	DO	SD clock line	TF card
23	CCI_I2C3_SDA	I/O	Dedicated I2C, for cameras only	For CIS3
25	CCI_I2C3_SCL	I/O	Dedicated I2C, for cameras only	For CIS3
27	CCI_I2C2_SDA	I/O	Dedicated I2C, for cameras only	For CSI2
29	CCI_I2C2_SCL	I/O	Dedicated I2C, for cameras only	For CSI2
31	CCI_I2C1_SDA	I/O	Dedicated I2C, for cameras only	For CSI1
33	CCI_I2C1_SCL	I/O	Dedicated I2C, for cameras only	For CSI1
35	CCI_I2C0_SDA	I/O	Dedicated I2C, for cameras only	For CSI0
37	CCI_I2C0_SCL	I/O	Dedicated I2C, for cameras only	For CSI0
41	GPIO_68*	DO	GPIO68, 1.8V level
43	CAM_MCLK3	DO	Camera master clock	For CSI3
45	CAM_MCLK2	DO	Camera master clock	For CSI2
47	CAM_MCLK1	DO	Camera master clock	For CSI1
49	CAM_MCLK0	DO	Camera master clock	For CSI0
53	CSI3_C2_LN3_M	AO	MIPI CSI3 data signal	4Lane
55	CSI3_B2_LN3_P	AO	MIPI CSI3 data signal	4Lane
57	CSI3_A2_LN2_M	AO	MIPI CSI3 data signal	4Lane
59	CSI3_C1_LN2_P	AO	MIPI CSI3 data signal	4Lane
61	CSI3_B1_LN1_M	AO	MIPI CSI3 data signal	4Lane
63	CSI3_A1_LN1_P	AO	MIPI CSI3 data signal	4Lane
65	CSI3_C0_LN0_M	AO	MIPI CSI3 data signal	4Lane
67	CSI3_B0_LN0_P	AO	MIPI CSI3 data signal	4Lane
71	CSI3_A0_CLK_M	AO	MIPI CSI3 clock signal	4Lane
73	CSI3_NC_CLK_P	AO	MIPI CSI3 clock signal	4Lane
77	CSI1_C2_LN3_M	AO	MIPI CSI1 data signal	4Lane
79	CSI1_B2_LN3_P	AO	MIPI CSI1 data signal	4Lane
81	CSI1_A2_LN2_M	AO	MIPI CSI1 data signal	4Lane
83	CSI1_C1_LN2_P	AO	MIPI CSI1 data signal	4Lane
85	CSI1_B1_LN1_M	AO	MIPI CSI1 data signal	4Lane
87	CSI1_A1_LN1_P	AO	MIPI CSI1 data signal	4Lane
89	CSI1_C0_LN0_M	AO	MIPI CSI1 data signal	4Lane
91	CSI1_B0_LN0_P	AO	MIPI CSI1 data signal	4Lane
95	CSI1_A0_CLK_M	AO	MIPI CSI1 clock signal	4Lane
97	CSI1_NC_CLK_P	AO	MIPI CSI1 clock signal	4Lane
38	CSI0_C2_LN3_M	AO	MIPI CSI0 data signal	4Lane
40	CSI0_B2_LN3_P	AO	MIPI CSI0 data signal	4Lane
42	CSI0_A2_LN2_M	AO	MIPI CSI0 data signal	4Lane
44	CSI0_C1_LN2_P	AO	MIPI CSI0 data signal	4Lane
46	CSI0_B1_LN1_M	AO	MIPI CSI0 data signal	4Lane
48	CSI0_A1_LN1_P	AO	MIPI CSI0 data signal	4Lane
50	CSI0_C0_LN0_M	AO	MIPI CSI0 data signal	4Lane
52	CSI0_B0_LN0_P	AO	MIPI CSI0 data signal	4Lane
56	CSI0_A0_CLK_M	AO	MIPI CSI0 clock signal	4Lane
58	CSI0_NC_CLK_P	AO	MIPI CSI0 clock signal	4Lane
62	CSI2_C2_LN3_M	AO	MIPI CSI2 data signal	4Lane
64	CSI2_B2_LN3_P	AO	MIPI CSI2 data signal	4Lane
66	CSI2_A2_LN2_M	AO	MIPI CSI2 data signal	4Lane
68	CSI2_C1_LN2_P	AO	MIPI CSI2 data signal	4Lane
70	CSI2_B1_LN1_M	AO	MIPI CSI2 data signal	4Lane
72	CSI2_A1_LN1_P	AO	MIPI CSI2 data signal	4Lane
74	CSI2_C0_LN0_M	AO	MIPI CSI2 data signal	4Lane
76	CSI2_B0_LN0_P	AO	MIPI CSI2 data signal	4Lane
80	CSI2_A0_CLK_M	AO	MIPI CSI2 clock signal	4Lane
82	CSI2_NC_CLK_P	AO	MIPI CSI2 clock signal	4Lane
36,39,51,54,60,69,75,78,84,93,94,99,100	GND	G	Digital ground

J3 Pin Definitions

PIN#	Signal	I/O	Description	Remarks
1	DEBUG_UART_TX	DO	UART data output signal, 1.8V level	Debug UART
3	DEBUG_UART_RX	DI	UART data input signal, 1.8V level	Debug UART
5	GPIO_34*	DO	GPIO34, 1.8V level
7	GPIO_35*	DI	GPIO35, 1.8V level
2	GPIO56_SPI_MISO*	DI	SPI MISO signal, 1.8V level	General-purpose SPI
4	GPIO57_SPI_MOSI	DO	SPI MOSI signal, 1.8V level	General-purpose SPI
6	GPIO58_SPI_CLK	DO	SPI clock signal, 1.8V level	General-purpose SPI
8	GPIO59_SPI_CS*	DO	SPI chip select signal, 1.8V level	General-purpose SPI
10	GPIO_36*	I/O	GPIO36, 1.8V level
9	GPIO_41*	I/O	GPIO41, 1.8V level
15	GPIO48_SPI_MISO*	DI	SPI MISO signal, 1.8V level	General-purpose SPI
17	GPIO49_SPI_MOSI	DO	SPI MOSI signal, 1.8V level	General-purpose SPI
19	GPIO50_SPI_CLK	DO	SPI clock signal, 1.8V level	General-purpose SPI
21	GPIO51_SPI_CS*	DO	SPI chip select signal, 1.8V level	General-purpose SPI
11	GPIO_37	DO	GPIO37, 1.8V level
13	GPIO_40*	DO	GPIO40, 1.8V level
12	GPIO_44*	DO	GPIO44, 1.8V level
14	GPIO_45*	DO	GPIO45, 1.8V level
16	GPIO52_TP_I2C_SDA	I/O	General-purpose I2C bus, 1.8V level	I2C touch communication
18	GPIO53_TP_I2C_SCL	DO	General-purpose I2C bus, 1.8V level	I2C touch communication
20	GPIO_54*	I/O	GPIO54, 1.8V level
22	GPIO_55*	I/O	GPIO55, 1.8V level
24	GPIO81_TP_INT*	DI	GPIO81, 1.8V level	I2C touch interrupt signal
26	GPIO105_TP_RST	DO	GPIO105, 1.8V level	I2C touch reset signal
23	FORCE_USB_BOOT	DI	Flashing mode signal
25	GPIO_137	I/O	GPIO137, 1.8V level
27	GPIO_138	DO	GPIO138, 1.8V level
29	GPIO96_MI2S0_MCLK	I/O	I2S master clock, 1.8V level
33	GPIO97_MI2S0_SCLK	I/O	I2S clock, 1.8V level	Non-LPI_I2S
35	GPIO100_MI2S0_WS	I/O	I2S channel select, 1.8V level	Non-LPI_I2S
37	GPIO98_MI2S0_DATA0	I/O	I2S data channel 0, 1.8V level	Non-LPI_I2S
39	GPIO99_MI2S0_DATA1	I/O	I2S data channel 1, 1.8V level	Non-LPI_I2S
30	GPIO_136*	I/O	GPIO136, 1.8V level
32	PM7350C_GPIO07	DO	PM7350C GPIO07, 1.8V level	eDP backlight enable signal
34	GPIO_165	DO	GPIO165, 1.8V level
36	GPIO_166*	DI	GPIO166, 1.8V level
38	GPIO_171	I/O	GPIO171, 1.8V level
40	GPIO_172*	I/O	GPIO172, 1.8V level
41	GPIO38_UART3_TXD	DO	UART data output signal, 1.8V level	General-purpose UART
43	GPIO39_UART3_RXD*	DI	UART data input signal, 1.8V level	General-purpose UART
42	GPIO_173	DO	GPIO173, 1.8V level	Host wakes Bluetooth signal
44	GPIO_174*	DI	GPIO174, 1.8V level	Wi-Fi wakes host signal
45	GPIO_28_BT_UART_CTS*	DO	General-purpose 4-wire UART, 1.8V level	AP6275P, Bluetooth communication
47	GPIO_29_BT_UART_RFR	DI	General-purpose 4-wire UART, 1.8V level	AP6275P, Bluetooth communication
49	GPIO_30_BT_UART_TX	DO	General-purpose 4-wire UART, 1.8V level	AP6275P, Bluetooth communication
51	GPIO_31_BT_UART_RX*	DI	General-purpose 4-wire UART, 1.8V level	AP6275P, Bluetooth communication
46	GPIO_86*	DI	GPIO86, 1.8V level	Bluetooth wakes host signal
48	GPIO_103*	I/O	GPIO103, 1.8V level
50	GPIO_80*	I/O	GPIO80, 1.8V level
52	GPIO_106	I/O	GPIO106, 1.8V level
53	GPIO24_SPI_MISO*	DI	SPI MISO signal, 1.8V level	General-purpose SPI
55	GPIO25_SPI_MOSI*	DO	SPI MOSI signal, 1.8V level	General-purpose SPI
57	GPIO26_SPI_SCLK	DO	SPI clock signal, 1.8V level	General-purpose SPI
59	GPIO27_SPI_CS*	DO	SPI chip select signal, 1.8V level	General-purpose SPI
54	GPIO_84	DO	GPIO84, 1.8V level	Wi-Fi enable signal
56	GPIO_85	DO	GPIO85, 1.8V level	Bluetooth enable signal
58	GPIO_107	I/O	GPIO107, 1.8V level
60	GPIO_108	I/O	GPIO108, 1.8V level
61	GPIO42_UART6_TXD	DO	UART data output signal, 1.8V level	General-purpose UART
63	GPIO43_UART6_RXD	DI	UART data input signal, 1.8V level	General-purpose UART
62	PM8008_1_RESET_N	DO	Reset signal reserved for PM8008
64	PM8008_2_RESET_N	DO	Reset signal reserved for PM8008
67	PCIE1_RESET_N	DO	PCIE1 reset signal, 1.8V level	PCIE1 CTL
69	PCIE1_CLK_REQ_N	DI	PCIE1 clock request signal, 1.8V level	PCIE1 CTL
71	PCIE1_WAKE_N	DI	PCIE1 wake signal, 1.8V level	PCIE1 CTL
75	PCIE1_RX1_P	AI	PCIE1 data input signal	PCIE GEN3
77	PCIE1_RX1_M	AI	PCIE1 data input signal	PCIE GEN3
79	PCIE1_RX0_M	AI	PCIE1 data input signal	PCIE GEN3
81	PCIE1_RX0_P	AI	PCIE1 data input signal	PCIE GEN3
85	PCIE1_REFCLK_M	DO	PCIE1 reference clock	PCIE GEN3
87	PCIE1_REFCLK_P	DO	PCIE1 reference clock	PCIE GEN3
91	PCIE1_TX1_M	AO	PCIE1 data output signal	PCIE GEN3
93	PCIE1_TX1_P	AO	PCIE1 data output signal	PCIE GEN3
95	PCIE1_TX0_M	AO	PCIE1 data output signal	PCIE GEN3
97	PCIE1_TX0_P	AO	PCIE1 data output signal	PCIE GEN3
68	PCIE0_RESET_N	DO	PCIE0 reset signal, 1.8V level	PCIE0 CTL
70	PCIE0_CLK_REQ_N	DI	PCIE0 clock request signal, 1.8V level	PCIE0 CTL
72	PCIE0_WAKE_N	DI	PCIE0 wake signal, 1.8V level	PCIE0 CTL
80	PCIE0_RX_P	AI	PCIE0 data input signal	PCIE GEN3
82	PCIE0_RX_M	AI	PCIE0 data input signal	PCIE GEN3
86	PCIE0_REFCLK_M	DO	PCIE0 reference clock	PCIE GEN3
88	PCIE0_REFCLK_P	DO	PCIE0 reference clock	PCIE GEN3
96	PCIE0_TX_M	AO	PCIE0 data output signal	PCIE GEN3
98	PCIE0_TX_P	AO	PCIE0 data output signal	PCIE GEN3
28,31,65,66,73,74,83,84,89,90,99,100	GND	G	Digital ground

J4 Pin Definitions

PIN#	Signal	I/O	Description	Remarks
1	GPIO_47_DP_HPD	DI	DP hot-plug detection signal	DP dedicated
2	GPIO_155*	I/O	GPIO155, 1.8V level
3	GPIO_46	I/O	GPIO46, 1.8V level
4	GPIO_154	I/O	GPIO154, 1.8V level
5	GPIO_83	I/O	GPIO83, 1.8V level
6	GPIO153_I2S1_DATA1	I/O	I2S1 data signal	LPI_I2S signal
8	GPIO152_I2S1_DATA0	I/O	I2S1 data signal	LPI_I2S signal
10	GPIO151_I2S1_WS	DO	I2S1 channel select signal	LPI_I2S signal
12	GPIO150_I2S1_CLK	DO	I2S1 clock signal	LPI_I2S signal
7	GPIO63_UART5_RXD*	DI	UART data input signal, 1.8V level	General-purpose UART
9	GPIO62_UART5_TXD	DO	UART data output signal, 1.8V level	General-purpose UART
11	GPIO_118_WDOG_DISABLE	I/O	Reserved configuration GPIO, WDOG enable signal
13	GPIO_157*	I/O	GPIO157, 1.8V level
15	GPIO156_HP_DET_L*	DI	Headphone insertion detection signal	FOR WCD9385
17	GPIO_5	I/O	GPIO5, 1.8V level
19	GPIO_4*	I/O	GPIO4, 1.8V level
16	GPIO_147_SWR_RX_CLK	DO	SoundWire receive clock signal line	FOR WCD9385
18	GPIO_148_SWR_RX_DATA0	I/O	SoundWire receive data signal line	FOR WCD9385
20	GPIO_149_SWR_RX_DATA1	I/O	SoundWire receive data signal line	FOR WCD9385
22	GPIO_158_SWR_TX_DATA2	I/O	SoundWire transmit data signal line	FOR WCD9385
24	GPIO_146_SWR_TX_DATA1	I/O	SoundWire transmit data signal line	FOR WCD9385
26	GPIO_145_SWR_TX_DATA0	I/O	SoundWire transmit data signal line	FOR WCD9385
28	GPIO_144_SWR_TX_CLK	DO	SoundWire transmit clock signal line	FOR WCD9385
23	USB0_DP_AUX_P	I/O	DP AUX signal
25	USB0_DP_AUX_N	I/O	DP AUX signal
29	USB0_SS_TX1_M	AI/AO	USB3.1 output data signal, compatible with DP output data signal
31	USB0_SS_TX1_P	AI/AO	USB3.1 output data signal, compatible with DP output data signal
33	USB0_SS_TX0_M	AI/AO	USB3.1 output data signal, compatible with DP output data signal
35	USB0_SS_TX0_P	AI/AO	USB3.1 output data signal, compatible with DP output data signal
39	USB0_SS_RX0_P	AI/AO	USB3.1 input data signal, compatible with DP output data signal
41	USB0_SS_RX0_M	AI/AO	USB3.1 input data signal, compatible with DP output data signal
43	USB0_SS_RX1_P	AI/AO	USB3.1 input data signal, compatible with DP output data signal
45	USB0_SS_RX1_M	AI/AO	USB3.1 input data signal, compatible with DP output data signal
32	PM7250B_GPIO6	I/O	PM7250B GPIO6
34	PM7250B_GPIO5	I/O	PM7250B GPIO5
36	PM7250B_GPIO4	I/O	PM7250B GPIO4
38	PM7250B_GPIO3	I/O	PM7250B GPIO3
40	PM7250B_GPIO2	I/O	PM7250B GPIO2
42	PM7250B_GPIO1	I/O	PM7250B GPIO1
44	GPIO164_I2C_SCL	OD	Sensor I2C bus, 1.8V level	SSC I2C
46	GPIO163_I2C_SDA	OD	Sensor I2C bus, 1.8V level	SSC I2C
48	PM7325_GPIO09	I/O	PM7325_GPIO09
50	PWM_PM7350C_GPIO_9	I/O	PM7350C PWM
52	GPIO162_I2C_SCL	OD	Sensor I2C bus, 1.8V level	SSC I2C
54	GPIO161_I2C_SDA	OD	Sensor I2C bus, 1.8V level	SSC I2C
49	USB0_SBU2	I/O	USB0 SBU signal line	For Type-C
51	USB0_SBU1	I/O	USB0 SBU signal line	For Type-C
53	USB0_CC2	I/O	USB0 CC signal line	For Type-C
55	USB0_CC1	I/O	USB0 CC signal line	For Type-C
56	GPIO160_I2C_SCL	OD	Sensor I2C bus, 1.8V level	SSC I2C
58	GPIO159_I2C_SDA	OD	Sensor I2C bus, 1.8V level	SSC I2C
57	RGB_RED	AO	Red LED high-side current source
59	RGB_GREEN	AO	Green LED high-side current source
61	RGB_BLUE	AO	Blue LED high-side current source
60	USB_OPTION	AI	PON selection, floating by default	Floating for Type-C; pull-down for Micro USB
62	USB0_CC_DIR	DO	Indicates Type-C connection direction
63,65	FLASH_LED2	AO	Flash LED current source
67,69	FLASH_LED1	AO	Flash LED current source
68,70	VPH_PWR	AO	3.6V output
75	USB1_HS_D_M	I/O	USB1 data-
77	USB1_HS_D_P	I/O	USB1 data+
14,21,27,30,37,47,64,66,71,73,79,72,74,76,78,80	GND	G	Digital ground