Rhino Core Q85 Intelligent Module
The Rhino Q85 intelligent module (Rhino Core Q85) is built on the Qualcomm QCS8550 platform with a 4nm process, delivering up to 48 TOPS of AI computing power. With a PCBA form factor of 40mm × 40mm (board thickness 1.0mm), it integrates LPDDR5X memory and UFS 4.0 storage, making it suitable for high-computing, high-stability scenarios such as robotics, industrial AI, high-end IPC/VR, and automotive applications.
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Core Specifications
| Category | Specification |
|---|---|
| SoC | QCS8550, 1581 MPSP package, 4nm process |
| AI Performance | 48 TOPS |
| CPU | 1× Kryo Prime @ 3.2GHz + 2× Kryo Gold @ 2.8GHz + 3× Kryo Silver @ 2.0GHz |
| GPU | Adreno 740 |
| RAM | LPDDR5X, up to 4266MHz, 12GB by default, up to 24GB |
| Storage | UFS 4.0, 128GB by default, up to 512GB |
| Power Supply | DC 3.5V ~ 4.2V (VBATT) |
| Dimensions | PCBA 40mm × 40mm (±0.5mm), board thickness 1.0mm (±10%), mating height 3.0mm |
| Operating System | Ubuntu 22.04 |
Peripheral Resources
| Interface Resource | Quantity | Performance |
|---|---|---|
| CSI | 5 | 4 groups of 4-lane + 1 group of 2-lane, DPHY V1.2 2.5Gbps/lane, CPHY v2.0 13.68Gbps/trio |
| SD | 1 | 4-bit, supports SD3.0 and SDR104, 1.2V I/O level only |
| PCIe | 1 | PCIe 3.0, 2-lane, 8Gbps |
| PCIe | 1 | PCIe 4.0, 2-lane, 16Gbps |
| DSI | 2 | 2 groups of 4-lane, up to 3480×2160@120Hz, 3360×1600@144Hz |
| USB | 1 | USB 3.1 Gen2, up to 10Gbps, supports OTG, DP 1.4 compatible, supports MST mode, optional 2×4K60-10bit or 1×8K30-DSC |
| SPI | 5 | 4 general-purpose SPI + 1 dedicated SPI, master mode only |
| UART | 10 | 1 debug, 1 4-wire, 8 2-wire |
| I2C | 9 | 4 camera-dedicated I2C, 4 general-purpose I2C, 1 sensor I2C |
| I2S | 2 | 1 non-LPI I2S, 1 LPI I2S |
| SWR | 1 | Supports PCM/PDM/DATA data formats |
| GPIO | 50 | 50 GPIO resources |
| ADC | 2 | 2 ADC, voltage range 0~1.875V, sampling rate 4.8MHz |
| PWM | 2 | PWM interfaces from PM8550 |
Quick Access
Module SpecificationsSoC platform, storage, power, power consumption, and environmental adaptability
Interfaces & PinsConnector pin definitions and interface descriptions
Power & BootPower supply scheme and boot process
Mechanical & Thermal DesignModule mechanical dimensions and thermal design reference
Carrier Board DesignCarrier board hardware design guide and reference circuits
ResourcesFirmware, tool software, and design material downloads
FAQ & TroubleshootingFrequently asked questions and solutions
Release NotesFirmware and documentation update records